3.18.37. RISC-V Options

3.18.37 RISC-V Options

These command-line options are defined for RISC-V targets:

-mbranch-cost=n

Set the cost of branches to roughly n instructions.

-mmemcpy
-mno-memcpy

Don’t optimize block moves.

-mplt
-mno-plt

When generating PIC code, allow the use of PLTs. Ignored for non-PIC.

-mabi=ABI-string

Specify integer and floating-point calling convention. This defaults to the natural calling convention: e.g. LP64 for RV64I, ILP32 for RV32I, LP64D for RV64G.

-mfdiv
-mno-fdiv

Use hardware floating-point divide and square root instructions. This requires the F or D extensions for floating-point registers.

-mdiv
-mno-div

Use hardware instructions for integer division. This requires the M extension.

-march=ISA-string

Generate code for given RISC-V ISA (e.g. ‘rv64im’). ISA strings must be lower-case. Examples include ‘rv64i’, ‘rv32g’, and ‘rv32imaf’.

-mtune=processor-string

Optimize the output for the given processor, specified by microarchitecture name.

-msmall-data-limit=n

Put global and static data smaller than n bytes into a special section (on some targets).

-msave-restore
-mno-save-restore

Use smaller but slower prologue and epilogue code.

-mcmodel=code-model

Specify the code model.

© Free Software Foundation
Licensed under the GNU Free Documentation License, Version 1.3.
https://gcc.gnu.org/onlinedocs/gcc-7.1.0/gcc/RISC_002dV-Options.html

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